1. Field of the Invention
This invention relates to an electrical circuit or pattern board or substrate, hereinafter referred to as "circuit board", and a process for manufacturing such a circuit board.
More particularly, this invention relates to a circuit board in which a plurality of layers of circuit patterns, such as signal patterns, are formed via insulative layers made of, for example, a synthetic resin such as a polyimide.
The various requirements for a semiconductor device or an electronic system having a semiconductor device mounted thereon have become more and more severe, since these systems are highly sophisticated and complicated, and some of these requirements, for example, high speed signal transmission lines, an effective prevention of signal wave strain, and a high density of the signal transmission lines, must be precisely met.
For example, to reduce a resistance of the signal transmission lines, a cross-sectional area of these signal transmission lines must be maintained to a certain extent, a metal material having a low electrical resistance must be used, and an impedance, inductance, capacitance or the like of the material used must be taken into consideration. Also, a material having a low dielectric constant must be used as a basic material or insulative material, to prevent a lowering of the signal transmission speed.
Further, to make it possible to obtain a more complicated pattern for the signal transmission lines, it has been proposed that multi-layered transmission lines be formed.
Thus, the present invention concerns a circuit board in which multi-layer circuit patterns, such as the patterns for signal transmission lines, are formed via insulative layers made of, for example, a synthetic resin having a low dielectric constant, such as polyimide.
2. Description of the Related Art
A conventional process for forming multi-layer circuit patterns comprises, as shown in FIGS. 6A and 6B, forming a conductive pattern 4 on a basic material 3 by using a photoresist 2, and forming insulative layers 5 on the conductive pattern 4. In this case, usually a photoresist 2 is used, whereby a conductive line forming pattern is first formed on the base material 3, a conductive pattern 4 is formed on the base 3, and the photoresist 2 is then removed to form insulative layers 5.
Another known process comprises: forming a conductive metal layer on a base 3, using a photoresist to form an etching pattern, and etching the conductive metal layer to form a conductive pattern 4.
In the conventionally known process for forming multi-layer circuit patterns, after the conductive pattern 4 is formed, the base 3 and the conductive pattern 4 are covered with an insulative layer 5 as mentioned above, but the surface of the insulative layer 5 may become uneven or contain undulations when the base 3 and the conductive pattern 4 are covered with the insulative layer 5, due to the protrusion of the conductive parts 4 from the base 3.
A signal pattern may be further formed as multi-layered patterns, or a semiconductor chip may be mounted, on an upper layer of the insulative layer 5, and therefore, the surface of the insulative layer 5 must be as flat and even as possible. For example, if a high density semiconductor chip is mounted on or connected thereto, the roughness of the surface of the insulative layer must be less than 3.mu.. Further, if a more sophisticated circuit pattern is required, more severe conditions with regard to the surface roughness must be satisfied.
Accordingly, a process for smoothing the undulated surface of the insulative layer is necessary, and currently, a lapping process is used for smoothing that surface. Such a lapping process, however, is time and labor consuming and is not particularly effective.